HV MOSFET Modeling with HiSIM_HV - MOS-AK R&D Association

HV MOSFET Modeling with HiSIM_HV - MOS-AK R&D Association

Hiroshima University HV MOSFET Modeling with HiSIM_HV Benchmarks and New Developments Ehrenfried Seebacher, Mitiko Muira Matausch, Kund Molnar 2011-09-16 Hiroshima University & HV Transistor Compact Modeling Requirements HV transistor sub-circuit modeling (the reference) State of the art HV Transistor Compact Models HiSIM_HV 1.x and 2.x Benchmarking: DC, AC Summary

2 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Presentation Overview 2011 austriamicrosystems Hiroshima University & 3 RON (On Resistor) (high vgs, low vds, and temp.) t as IDSAT (Saturation Current) ?

s a c e l e VT long & short t sp a lu d ess le Cgg & Cgd Miller Cap o oc sib h Analog parameter for long channel length l s r os P e p e d t RF Parameter FT, FMAX ? o a s

M str d a n oo o m g e d All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. FOMs for HV Transistor Modeling 2011 austriamicrosystems Hiroshima University & Nwell PWELL Increased junction breakdown voltage (BV) of the drain diffusion is achieved

by using a deep drain well Small on-resistance and high BV are contrary effects. The optimization of the tradeoff between both quantities is of major interest. PWELL NWELL The gate length is extended beyond the body-drain well junction, which increases the junction BV. The gate acts as a field plate to bends the electric field. RESURFeffect Quasi-Saturation Effect. 4 Nwell All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. HV CMOS Transistor Types

2011 austriamicrosystems All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Sub-circuit Modeling 5 2011 austriamicrosystems Hiroshima University & HV MOS Transistor Model Features: Basic geometrical and process-related aspects such as oxide thickness, junction depth, effective channel length and width RON modeling Quasi saturation region and the saturation region Geometry scaling, Short-channel effects 1/f and thermal noise equation Temperature Modeling for RON, VT, IDSAT

High Voltage Parasitic Models Bulk (Substrate) current Effects of doping profiles, substrate effect Modeling of weak, moderate and strong inversion behavior Parasitic bipolar junction transistor (BJT). 6 Model Limitations: RF modeling SH modeling Cgd, Cgg Graded channel Impact ionization in the drift region High-side switch (sub-circuit extension needed). All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Sub-circuit Model Features and Limitations 2011 austriamicrosystems

Hiroshima University & State of the Art HV Compact Models and new Developments Under development within the EU Project COMON A Physics-Based Analytical Compact Model for the Drift Region of the HV-MOSFET Antonios Bazigos, Franois Krummenacher, Jean-Michel Sallese, Matthias Bucher, Ehrenfried Seebacher, Werner Posch, Kund Molnr, and Mingchun Tang PSP HV Transistor Model In development based on PSP surface potential model MM20 asymmetrical, surface-potential-based LDMOS model, developed by NXP Research HiSIM_HV CMC Standard model version 1.1.2 and 1.2.1 Version 2.0.0 in evaluation 7 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. EKV HV Transistor

2011 austriamicrosystems Hiroshima University & Extension of Bulk-MOSFET Model HiSIM2 fS0 : at source edge fSL : at the end of the gradual-channel approx. fS(DL) : at drain edge (calculated from fSL) Beyond Gradual-Channel Approximation Channel-Length Modulation Overlap Capacitance All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Complete Surface-Potential-Based Model

2011 austriamicrosystems a few hundred volts > Bias Range > a few volts (Asymmetric) Vgs,eff = Vgs Ids x Rs Vds,eff = Vds Ids x (Rs + Rdrift ) Vbs,eff = Vbs Ids x Rs potential drop (Symmetric) All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & HiSIM-HV 2011 austriamicrosystems

Hiroshima University & Ndrift Vds Potential drop in the drift region V Y. OritsukiDDP et al., IEEE TED, 57, p. 2671, 2010. All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Consistent Modeling in Drift Region Ldrift Y. Oritsuki et al., IEEE TED, 57, p. 2671, 2010. 11 2011 austriamicrosystems

fS(DL) VV DDP DDP fS(DL) : potential determining LDMOS characteristics HV Vgs [V] HV Vds [V] HiSIM reproduces fS(DL) calculated by 2D-device simulator. 12 fS(DL) [V] fS(DL) [V]

All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. fS(DL) [V] fS(DL) [V] Hiroshima University & Key Potential Values 2011 austriamicrosystems HiSIM_HV 1.0.0 Series Bias Dependence is modeled based on principle. Y. Oritsuki et al., IEEE TED, 57, p. 2671, 2010. All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University &

Modeling of Rdrift 2011 austriamicrosystems Id [A] Vgs=7.5V Accuracy Comparison of Ids-Vds : 2D-Device Simulation Results : HiSIM-HV Results Vgs=10V Vgs=5V Vgs=2.5V Quasi-saturation behavior of LDMOS is reproduced. 14 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz.

gd [S] Hiroshima University & 2011 austriamicrosystems Relatively High Breakdown Voltage All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Current-Voltage Characteristics Relatively Low Breakdown Voltage 2011 austriamicrosystems Ids - Vgs Gm vs. Vgs

Care must be taken when adjusting critical parameters describing the Vgs dependence. All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Empirical Model: Issues 2011 austriamicrosystems 17 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. HiSIM_HV 1.1.2 v. BSIM3v3 Subcircuit Hiroshima University & Model Benchmark Output Characteristic 2011 austriamicrosystems

Capacitance [fF] 2.0 0.8 Cgg 1.8 1.2 Cgb -4 -2 Cgd Vds=0V Cgs 0.4 0

Vgs [V] 2 Normal MOSFET Asymmetrical LDMOS Symmetrical HVMOS 4 Vgs [V] All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Capacitance [fF] Hiroshima University & Capacitance-Voltage Characteristics 2011 austriamicrosystems

BSIM3+JFETS Subckt. Subcircuit: bad fitting quality, especially in accumulation. HiSIM_HV: good fitting quality in all regions. 19 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & AC Modeling: Cgg HiSIM_HV 2011 austriamicrosystems All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University &

Self-Heating Effect for DC Analysis 2011 austriamicrosystems RC-Network: All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Self-Heating Effect for AC Analysis 2011 austriamicrosystems HiSIM_HV 2.0.0 Series MOSFET + Resistor DP Channel MOSFET Resistor

22 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Modeling Rdrift 2011 austriamicrosystems Node potential Vddp is solved iteratively. All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & 2011 austriamicrosystems VDDP Velocity saturation affects strongly on I-V characteristics.

24 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Iddp Hiroshima University & I-V Characteristics of Resistor 2D-Device Simulation 2011 austriamicrosystems Hiroshima University & Lover Wdep Djunc Wjunc Iddp W xov

W0 xdep Vddp q n drift Ldrift xov xjunc xov W0 W0 W0 - A Wdep + W junc D Lover junc

xdep Iddp Vddp All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Modeling Current-Flow in Overlap Region xjunc W0 Lover2 Djunc 2 Djunc : junction depth : current exude coefficient into A depletion region 25 2011 austriamicrosystems Hiroshima University &

2D-Device Sim. HiSIM_HV Id [mA] Vds = 0.5V, 2V, 5V, 10~30V Id [mA] Vgs [V] Vgs= 3~9V, 15V, 30V Vds [V] xov improvements The xov model enables to fit I-V characteristics for wide range of bias conditions.

Vds = 0.5V, 2V, 5V, 10~30V Vds = 0.5V, 2V, 5V, 10~30V Vgs [V] Id [mA] Id [mA] (Lch = 1m , Lover = 1m, Djunc = 2m) All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Verification of I-V Characteristics Vgs= 3~9V, 15V, 30V Vgs= 3~9V, 15V, 30V Vds [V] 27

2011 austriamicrosystems HiSIM_HV 1.x.x Old Empirical Ids - Vgs Gm vs. Vgs All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & Empirical Model vs. Physical Model: IdVg HiSIM_HV 2.x.x New Physical 2011 austriamicrosystems HiSIM_HV 1.x.x Old Empirical All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz.

Hiroshima University & Empirical Model vs. Physical Model: IdVd HiSIM_HV 2.x.x New Physical 2011 austriamicrosystems All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Hiroshima University & HiSIM_HV Release 2011 austriamicrosystems Hiroshima University & HiSIM_HV 1.2.1 v. BSIM3 sub-circuit HV NMOS output and transfer characteristic of a typical wafer. W/L=40/0.5, VGS= 2.9, 4.8, 6.7, 8.6, 10.5, 12.4, 14.3, 16.2, 18.1, 20 V, VBS=0 V. & VBS= 0, -1, -2, -3, -4 V, VDS=0.1 V.

+ = measured, full lines= BSIM3v3 model; dashed lines = HiSIM_HV 1.2.1 31 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. The Extreme Case; 120V Transistors 2011 austriamicrosystems Hiroshima University & - HVMOS used on the low-side of a load: Transfer Characteristics Source and Substrate hold at the same potential - HVMOS used on the high-side of a load: Both Source and Drain can be placed at high potential => Ron is changing with Vsub-s Vsub=0 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of

austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. Isolated HVMOS: High-Side Switch Modeling Vsub=-120V Vd=0.1V, Vs=Vb=0 HiSIM_HV 1.2.1: Vsub modulates the effective depth of the drift region: Rdrift(V sub,s) 32 2011 austriamicrosystems Hiroshima University & The following effects are also included: Depletion effect of the gate polycrystalline silicon (poly-Si). Quantum mechanical CLM Narrow channel STI Leakage currents (gate, substrate and gate-induced drain

leakage (GIDL) currents). Source/bulk and drain/bulk diode models. Noise models (1/f, thermal noise, induced gate noise). Non-quasi static (NQS) model. Complete Surface potential-based: HiSIM_HV solves the Poisson equation along the MOSFET channel iteratively, including the resistance effect in the drift region. high flexibility 20 model flags scales with the gate width, the gate length, the number of gate fingers and the drift region length. In addition, HiSIM_HV is capable of modeling symmetric and asymmetric HV devices. 33

All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. HiSIM_HV 2011 austriamicrosystems Decision for HV Model depends very much on the application Sub-circuit approach is very flexible and usable for switching applications and for analog applications using large transistors sizes. HiSIM_HV 1.1.2 and 1.2.1 shows high accuracy for all benchmarks. Detailed know how in parameter extraction needed Extensive measurements necessary. HiSIM_HV 2.x First Version New physical drift region model is under evaluation and shows excellent benchmark results. 34 All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz.

Summary 2011 austriamicrosystems All rights reserved. 2011 austriamicrosystems AG. Material may not be reproduced without written approval of austriamicrosystems and may only be used for noncommercial educational purposes at the University of Technology Graz. - analog experts to help you leap ahead 2011 austriamicrosystems

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